Field
The present disclosure relates generally to memory circuits, and more particularly, to a memory with a random noise stress operation.
Background
Memory is a vital component for wireless communication devices (e.g., integrated as part of an application processor in a cell phone). With the ever increasing demands for more processing capability, the design of wireless communication devices calls for more memories fabricated in smaller dimensions. With the shrinking dimensions, certain issues in memories have become more apparent. Among these issues are increasing failures due to random noise, such as the random telegraph noise.
In some examples, the random telegraph noise may result from sudden and random transitions between two or more discrete voltage levels. As the dimensions of memories shrink, the random telegraph noise may occur more often and the effect more severe. Parts affected or potentially affected by the random noise issue are difficult to screen out during testing of the memories (e.g., testing of the application processors incorporating the memories). In some memories, such random noise may cause the memory cells to flip stored states. As a result, users of the wireless communication devices may experience operation failures in use due to the random telegraph noise issue. Such failures are thus costly both in terms of managing the returns of the expensive wireless communication devices and, perhaps worse, negative consumer experiences.
Minimizing dimensions of integrated circuits (ICs; e.g., memories) carries substantial advantages, particularly in mobile applications. Accordingly, a design challenge is to address the random noise issue.